A Fail-Safe CMOS Logic Gate

نویسنده

  • V. Bobin
چکیده

This paper reports a design technique to make Complex CMOS Gates fail-safe for a class of faults. Two classes of faults are denned. The failsafe design presented has limited fault-tolerance capability. Multiple faults are also covered.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Low Voltage Operation of Master-Slave Flip-Flops for Ultra-Low Power Subthreshold LSIs

In this paper, we investigate low voltage operation of master-slave flip-flops (MSFFs) for ultra-low power subthreshold CMOS LSI families. Static MSFF, which consists of NAND gates, shows the most stable operation, while dynamic MSFFs are unsuitable for low voltage operation because switching gates fail to operate at low voltage. Low voltage limitation of static MSFF depends on that of CMOS gat...

متن کامل

Ultra Low Power Symmetric Pass Gate Adiabatic Logic with CNTFET for Secure IoT Applications

With the advent and development of the Internet of Things, new needs arose and more attention was paid to these needs. These needs include: low power consumption, low area consumption, low supply voltage, higher security and so on. Many solutions have been proposed to improve each one of these needs. In this paper, we try to reduce the power consumption and enhance the security by using SPGAL, ...

متن کامل

A New Design for Two-input XOR Gate in Quantum-dot Cellular Automata

Quantum-dot Cellular Automata (QCA) technology is attractive due to its low power consumption, fast speed and small dimension, therefore, it is a promising alternative to CMOS technology. In QCA, configuration of charges plays the role which is played by current in CMOS. This replacement provides the significant advantages. Additionally, exclusive-or (XOR) gate is a useful building block in man...

متن کامل

Implementation Of Xor Gate Using Cmos Logic

Adiabatic logic is an implementation of reversible logic in CMOS where the current flow through the circuit is The dual rail toffoli gate is designed using transmission gate. minimum sized XOR gate is implemented at 0.12ìm. solving the problems. Transmission Gate (TG) uses to realize complex logic functions by using a small number It is implemented in Standard CMOS logic (3). Proposed CLA imple...

متن کامل

A fail safe programmable logic controller

To architecturally support the programming of safety related control applications in the graphical language function block diagram and the verification of such software meeting the requirements of Safety Integrity Level SIL 3, a dedicated, low complexity execution platform is presented. Its hardware is fault detecting to immediately initiate emergency shut-downs in case of malfunctions. With th...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2010